Distinguished Lecture:

Low Power Asynchronous-Microprocessor Design

Abstract:
Asynchronous-logic is an emerging methodology where the microprocessor will be increasingly asynchronous – 40% by 2020 from the present 11% (ITRS roadmap). It is an alternative design approach (as opposed to prevalent synchronous-logic) to ultra low power digital circuits and it could be robust to the process, voltage and temperature (PVT) variations for biomedical applications and the like. In this talk, an overview from the following perspectives will first be given: some pertinent requirements of low-power portable applications, the current-art technology roadmap and its technology challenges, and a review of asynchronous-logic and synchronous-logic. Thereafter, the completed and on-going asynchronous-logic projects will be presented, in part, for the design of low power biomedical applications. These projects include a Fast Fourier Transform processor, an Intel-based 8051 microcontroller, a Motorola-based 24-digital signal processor, a globally-synchronous-locally-asynchronous (GALS) acoustic signal processor and an asynchronous electronic design automation tool. Finally, some potential projects by adopting asynchronous-logic will be discussed.

Presenter(s):
Dr Bah-Hwee Gwee received his B.Eng. degree from University of Aberdeen, UK, in 1990. He received his M.Eng. and Ph.D. degrees from Nanyang Technological University (NTU), Singapore in 1992 and 1998 respectively. He is currently an associate professor and the assistant chair in the School of EEE, NTU. He has been working on a number of funded research projects amounting to SGD $5.6m (~US$4m). He is the PI/co-PI of projects including the DARPA project from USA, the AUNP project from EU, Panasonic Semiconductors (Singapore) research project, Linköping University (Sweden) – NTU research collaboration project, Singapore Defence Science Project and Academic Research Funded Projects. 

He was the Chairperson of IEEE CAS Singapore Chapter in 2005 and 2006. He is the committee member of IEEE CASS VLSI Systems TC, DSP TC, BioCAS TC and Life Science TC. He was the organizing committee of IEEE Bio-CAS 2004, IEEE APCCAS 2006 and the Programme Chair of ISIC 2007 and ISIC 2011. He is a senior member of IEEE, Associate Editors of IEEE Transactions on Circuits and Systems II: Brief Express and Journal of Circuits, Systems and Signal Processing, and the IEEE CASS Distinguished Lecturer. His research interests include asynchronous circuit design, ultra-low power robust sub-threshold design, dynamic voltage scaling, Class-D amplifier design and digital hearing aid design. He has several circuit design patents filed/granted and co-founded a high-tech Start-up Company in 2005.

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